(1) Field of the Invention
The present invention relates to CCD (Charge Coupled Device) type solid-state image sensors, and more particularly to element isolation region structures thereof and method of manufacturing the same.
(2) Description of the Related Art
In CCD type solid-state image sensors, increasing the number of pixels in an image sensor region formed on a chip and reducing the image sensor size by producing finer semiconductor elements are very important, and the development in these connections is being made vigorously. Presently, solid-state image sensors, in which 2,000,000 pixels are formed in a 2/3 inch optical format size, are available.
In such advancement of CCD type solid-state image sensors, it is important to reduce smear, i.e., generation of false signal due to flow of charges into a vertical CCD region to be described later. A prior art CCD type solid-state image sensor will now be described with reference to FIGS. 1A, 1B, 2A and 2B. FIGS. 1A and 1B are plan views showing the device, and FIGS. 2A and 2B are sectional views showing a pixel section.
FIG. 1A is a plan view showing a usual inter-line CCD type solid-state image sensor. This inter-line CCD type solid-state image sensor comprises a plurality of photodiodes 101, vertical CCD regions 102 for receiving and transferring charge from the photodiodes, a horizontal CCD register 103 for receiving and transferring charge from the vertical CCD regions, a charge detector 104 for detecting charge that has been transferred from the horizontal CCD register, and an output amplifier 105. The portion enclosed within a broken line rectangle is a unit pixel 106.
FIG. 1B is a plan view showing the structure of the unit pixel 106. As shown in FIG. 1B, the unit pixel 106 has an element isolation region 107 or 107a which is constituted by a P-type diffusion layer. A photodiode region 108 is formed so as to be within the element isolation region 107. Charge generated in the photodiode region 108 is transferred through a transfer transistor to the vertical CCD region. The gate electrode of this transfer transistor is a transfer gate electrode 109. The gate electrode of this vertical CCD region is constituted by a transfer gate electrode 110 and the transfer gate electrode 109. A light-shielding film 111 is formed to cover the vertical CCD. The light-shielding film 111, as shown in FIG. 1B, has an opening formed in a region corresponding to the photodiode region 108.
The sectional structure of the unit pixel will now be described with reference to FIGS. 2A and 2B. FIG. 2A is a sectional view taken along line 2A--2A in FIG. 1B. FIG. 2B is a sectional view taken along line 2B--2B in FIG. 1B.
Referring to FIGS. 2A and 2B, a P-type impurity well layer 202 is formed on the surface of an N-type semiconductor substrate 201. An N-type impurity layer 203 constitutes the photodiode region 108 shown in FIGS. 1A and 1B, and a P.sup.+ -type impurity layer 204 is formed on the layer 203 for suppressing dark current. A transfer impurity layer 205 constitutes a channel region of the vertical CCD region 102 shown in FIGS. 1A and 1B, and a P-type impurity layer 206 is formed under the layer 205. The transfer impurity layer 205 usually has N-type conductivity. Between adjacent photodiode regions 108 shown in FIGS. 1A and 1B and also between the photodiode regions 108 and the vertical CCD regions 102, an element isolation region 208 is formed except for a channel region 207 of the transfer transistor. Although not shown, an additional impurity layer may be formed in the neighborhood of the semiconductor substrate surface of the channel region 207 for transistor threshold voltage adjustment. A gate insulating layer 209, such as a silicon dioxide film or a nitride film, is formed on one principal surface of the N-type substrate 201. A transfer gate electrode 210, such as a polysilicon film, and a transfer gate electrode 211 constituting the gate electrode of transfer transistor, are formed on the layer 209. A further insulating film (not shown), is formed between the transfer gate electrode 210 and the transfer gate electrode 211. Over these electrodes a light-shielding film 213, such as a tungsten film or an aluminum film, is formed via an inter-layer insulating film 212, such as a silicon dioxide film. A cover film, such as a silicon dioxide film, is formed to cover the structure as described.
One of the important characteristics of the CCD is the smear characteristic. The smear is generally constituted by three elements, i.e., electrons that are generated by light incident on the substrate and diffused in the vertical CCD regions, electrons generated by light incident on the vertical CCD regions due to multiple reflection between the transfer gate electrodes and the surface of the semiconductor substrate, and electrons generated by light transmitted through the light-shielding film and incident on the vertical CCD regions.
Among these electrons, those which are generated due to the multiple reflection mentioned above, are reduced by the thickness reduction of the gate insulating film resulting from finer structure of the semiconductor elements explained above. The electrons among those attributable to the transmission through the light-shielding film, are reduced by improving the step coverage in the formation of the tungsten film and aluminum film.
On the other hand, the electrons that are generated by light incident on the surface of the semiconductor substrate and diffused in the vertical CCD regions, are more pronounced as the semiconductor element structure becomes finer. In the present technique, however, the consideration given to the diffused electrons is insufficient. For example, the relation between the impurity concentrations in the P.sup.+ -type impurity layer 204 and the element isolation region 208 shown in FIGS. 2A and 2B, has not yet been particularly investigated. Generally, the P.sup.+ -type impurity layer 204 is formed to have a depth of 0.1 to 0.3 .mu.m for improving the blue sensitivity of the photodiode. The main purpose of the P.sup.+ -type impurity layer 204 is to reduce dark current by preventing the formation of a depletion layer on the semiconductor substrate surface of the photodiode region contiguous to the gate insulating film 209. The P.sup.+ -type impurity layer 204 which is thin as explained above, has to have sufficiently high impurity concentration. This means that the impurity concentration of the P.sup.+ -type impurity layer is comparable to or above the impurity concentration of the element isolation region 208. Under this condition, it is necessary to take into consideration new diffused electrons explained hereunder.
With a fine pixel size of about 5 .mu.m square, the width of the element isolation region 208 is about 0.6 .mu.m. For smear suppression, it is necessary to increase the extent in which the light-shielding film 213 extends over the photodiode region 108. On the other hand, the dose of light incident on the N-type impurity layer 203 of the photodiode, is restricted by the size of the opening in the light-shielding film 213. Thus, it is necessary to increase the size of the opening for sensitivity increase. As a result of the trade-off of the two factors, it is possible to set the distance between the end of the light-shielding film and the end of the element isolation region to be as small as about 0.5 .mu.m. The thermal motion speed of electrons at room temperature is about 10.sup.5 m/sec., and electrons generated in the P.sup.+ -type impurity layer 204 by light irradiation on the neighborhood of the end of the light-shielding film, can move a distance of about 1 .mu.m in about 10.sup.-11 sec. This time interval is far short compared to the lifetime of electrons in the interface between the semiconductor substrate and the insulating film or the lifetime of electrons in the element isolation region. Therefore, electrons generated in the P.sup.+ -type impurity layer 204 are partly diffused, without being vanished, in the P.sup.+ -type impurity layer 204 and element isolation region 208 to flow into the transfer impurity layer 205 constituting the vertical CCD regions. This leads to the problem of increasing the smear.